efficient FFT computation
Computation of a group of small FFT vectors. The computation efficiency increases when the size of the group of vectors increases, and decreases when the size of a vector in the group increases. The computation demands rearrangement of the input, rearrangement of the output and a small change in the FFT function.
Mi perfil
Chip skills: SISD (ADQI21065l), SIMD(Pentium4, ADI21168,ADI21368), MIMD(factory designed to produced card embedded with SIMD chips), efficient algorithms in time and space that demand the understanding of the chip architecture (memory configuration, pipeline, DMA ext.). Using chip hardware communication oriented components: UART, rs-422, serial port, SHARC links, ext. Radar processing algorithms skills: bias reduction, asynchronous interferences reduction, beams from channels forming in azimuth and elevation in phased array radars, moving target indicator, constant false alarm rate algorithms, false alarm reduction in range axis (using the range local noise) and in Doppler axis (using the Doppler noise), peak detection in range Doppler azimuth elevation ext., detection/search radars azimuth target association and extraction, targets association by classification, M out of N algorithm for various classes of targets. FFT and FFT related algorithms skills: Algorithm and implementation to improve FFT efficiency by implementing the FFT on a group of vectors, dynamic, FFT scaling on fixed point chips, peak detection by FFT results refinement (that is achieved by FFT coefficient refinement). Programming languages: used extensively C, C++, assembler, MATLAB Used when needed EXCEL, visual basic Operating systems: windows 7, use of Microsoft windows API. Projects: Detection/search pulse Doppler RADARS, phased array RADARS, people/vehicle detection using LFM/CW RADARS, horse competition detection using transponders, fuel in container depth measurement.
$ 60 USD / hora
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