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    Upload/Objects, files to s3 COMPATIBLE STORAGE C# Finalizado left

    Create a C# WebService project for following functions in S3 compatible storage Uploading, Downloading and Deleting a File to a bucket / folder - Obtaining a list of files to a bucket/folder - Get Metadata of files - Adding / Updating Metadata of files - Creating a new Bucket/Folder - Lazy load file - Fetch Public Link files / URL Endpoint being used: Login credentials will be provided during Chat. Please contact if you have experience with the requirement.

    .NET Amazon S3 ASP.NET Programación en C# Servicios web
    $29 (Avg Bid)
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    VHDL Project Finalizado left

    The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gates, for design entry, documentation, and verification purposes. Since 1987, VHDL has been standardized by the Ins...of abstraction, ranging from the system level down to that of logic gates, for design entry, documentation, and verification purposes. Since 1987, VHDL has been standardized by the Institute of Electrical and Electronics Engineers (IEEE) as IEEE Std 1076; the latest version of which is IEEE Std 1076-2019. To model analog and mixed-signal systems, an IEEE-standardized HDL based on VHDL called VHDL-AMS (officially IEEE 1076.1) has been ...

    FPGA Verilog / VHDL
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    Digital Verilog Time sensitive Finalizado left

    1) Frequency divider by - / 2n - / by any integer 2) Serial Peripheral Interface (SPI) - Both master and slave 3) UART TX/RX - Asynchronous serial communication - Start bit, Stop bit, over sampling etc. - Exercise on cross-clock domain synchronizer What to submit - RTL code (.v) with inline comment - Test bench (.v) with inline comment - Timing diagram (gtkwave) with annotation - Rough description of the corresponding circuit Quick turnaround needed

    Ingeniería eléctrica Electrónica Microcontrolador Verilog / VHDL
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    Need a System Verilog Expert for digital logic circuit design Finalizado left

    Need a System Verilog Expert for digital logic circuit design

    Ingeniería eléctrica Electrónica Ingeniería FPGA Verilog / VHDL
    $16 (Avg Bid)
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    Verilog programming Finalizado left

    Multicycle Processor Controller

    Assembler Programación en C FPGA Microcontrolador Verilog / VHDL
    $555 (Avg Bid)
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    Verilog Coding Finalizado left

    We need to program a FPGA board using verilog code with XNOR, Multiply, shiftleft and add modules that can run on the board using different switches. When we compile the code there are no errors but when we try to put the code onto the board it is showing only zeros so we think that there is something wrong with the XNOR, Mul, shiftleft or ADD modules. I will attach all codes and the manual for the project below, thanks.

    Ingeniería eléctrica FPGA FPGA Coding Microcontrolador Verilog / VHDL
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    implementation of gradient descent optimizer on FPGA in verilog code which is synthesizable -- 2 Finalizado left

    Hi Moaz Khaled Feriz K., I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    Altera Quartus ASIC Digital ASIC Coding FPGA Verilog / VHDL
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    Verilog circuit modelling Finalizado left

    The entire description of the project is in the file below Circuit modeling in

    Diseño de circuitos Ingeniería eléctrica Ingeniería LabVIEW Verilog / VHDL
    $188 (Avg Bid)
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    Description of the module for receiving / transmitting information on the verilog for the Pmod MAXSONAR Finalizado left

    Need to implement Pmod MAXSONAR on Arty A7-35T board

    Electrónica FPGA Verilog / VHDL
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    Toolbar headings rewrite Finalizado left

    I am developing some software but the menu needs the headings rewriting to be different to what they are now. Example View Messages – maybe change to view mail Last AMS Message – maybe change to Last Message Send Message - – maybe change to Send Mail. These are all in the left toolbar They must look different. Example View Messages – maybe change to view mail Last AMS Message – maybe change to Last Message Send Message - – maybe change to Send Mail. These are all in the left toolbar They must look different.

    Redacción de artículos Redacción de libros Redacción creativa Libros electrónicos Redacción por encargo
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    Implementation of the Complex system in System Verilog and FPGA -- 2 Finalizado left

    Hi Mohammed Ibrahim, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    Ingeniería eléctrica Mathlab y Mathematica Python Arquitectura de software Verilog / VHDL
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    Implementation of the Complex System in System Verilog and FPGA Finalizado left

    Hi Mohammed Ibrahim, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    Ingeniería eléctrica Mathlab y Mathematica Python Arquitectura de software Verilog / VHDL
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    Implementation of Gradient descent optimizer on FPGA in verilog code which is synthesizable Finalizado left

    I need to design gradient descent optimizer on FPGA in verilog language and code should be synthesizable. entire design should be pipelined. Input and outputs should be in single precision floating point representation. loss or cost function is mean square error loss for 2D variables, minimise the above cost functions to achieve the optimised value. I have developed gradient descent optImizer on python , below attached file is code of it. I want same implementation in verilog

    Python Verilog / VHDL
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    Verilog Coding Finalizado left

    My project includes working on a verilog code for a stair case encoder. Below is the image of the architecture of the encoder and for each seperate block, i need codes for it. A full description of the project will be given to you in the form of a research paper. If you know how to write codes in verilog, kindly contact me. We can discuss more about the project as I have already done a small part of it and need help for the rest of the blocks. Price is negotiable. Thank you.

    Desarrollo Ingeniería eléctrica FPGA Verilog / VHDL Very-large-scale integration (VLSI)
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    Project for Athul B. Finalizado left

    Hi! I need in System Verilog this: A module that receives 16bits 1 bit for positive or negative number and 15 bits for number then the module is going to create the BCD for all the possibilities negotiable payment!

    Analog Electronics Digital Electronics FPGA FPGA Coding Verilog / VHDL
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    verilog programming Finalizado left

    Hoy I need in System Verilog this: A module that receives 16bits 1 bit for positive or negative number and 15 bits for number then the module is going to create the BCD for all the possibilities this is a project in SystemVerilog using Nexys4 negotiable payment!

    .NET Algoritmos Amazon Web Services Apache API
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    Project for Sardar Hasnain A. Finalizado left

    I need in System Verilog this: A module that receives 16bits 1 bit for positive or negative number and 15 bits for number then the module is going to create the BCD for all the possibilities this is a project in SystemVerilog using Nexys4

    Programación en C Ingeniería eléctrica Electrónica Ingeniería Microcontrolador
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    Tic Tac Toe using verilog Finalizado left

    I'm trying to solve 5*5 grid tic tac toe game using Verilog, i need help in developing the tic tac toe game for 5*5 grid

    Programación en C Ingeniería FPGA Microcontrolador Verilog / VHDL
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    System Verilog code help Finalizado left

    Hi developers. I am looking for quick help for System Verilog code help. Please apply if you are expert in Verilog. Thanks.

    Ingeniería FPGA Mathlab y Mathematica Arquitectura de software Verilog / VHDL
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    Digital Marketing Consultant Finalizado left

    ...critical thinking and problem-solving skills Excellent verbal and written communication skills Strong analytics skills Ability to work independently Ability prioritize and manage your own schedule Bachelor’s degree in marketing or related field 3+ years of experience in marketing or related role ideally within a multi-channel retailer or agency Hands-on experience with Amazon Advertising (previously AMS), Google, Bing, Facebook, Instagram, TikTok, YouTube, Snapchat, etc. Experience working with direct response campaigns ...

    Amazon Web Services Marketing de Facebook Google Adwords Marketing en redes sociales TikTok
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    Quick help needed on coming up with a dynamic Allocation of 2-Dimension System Verilog port Finalizado left

    I have a localparamter declared in my SystemVerilog like this (y is another Parameter) : localparam x = y ? 4 : 1 , Then I have a RTL port which is something like this (where z is another parameter): input logic [x-1:0][((z+1)*8-1):0] port1, But I want to use 'y' directly in this port1 instead of x. Can I somehow use 'y' instead of x to dynamically allocate the value of it. It should be able to compile/elaborate. Should be quick

    Programación en C Electrónica Ingeniería Microcontrolador Verilog / VHDL
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    FBA/Amazon/Ebay/DropShip/Seller Central/PL/OA⭐⭐⭐⭐⭐ Finalizado left

    ...shipment. c. Accepting returns. d. Reverse logistics. e. Liaising with Amazon for missing units. 7. Amazon seller feedback management. a. Maintaining Account . 8. Inventory planning and forecasting. 9. Inventory Management. a. Making sure the product is available all the time. b. Resolving reserved inventory issues. 10. Making sure listing stays live. 11. Chasing Amazon for cases. 12. Managing AMS (Amazon Marketing services). a. Creating an advert campaign. b. Analyzing ongoing campaigns. c. Planning and forecasting for Advert Expenditure. 13. Reporting and Report Analysis. a. Sales report. b. Returns report. c. Shipment report. d. Profit analysis. e. Inventory report. 14. Managing and fixing pricing errors. a. Making sure our prices are correct all the time so we don’t...

    Amazon Web Services Entrada de datos eBay Descripciones de productos Búsqueda en la web
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    verilog fpga programming in linux Finalizado left

    Verilog FPGA programming in Linux

    Programación en C FPGA Linux Microcontrolador Verilog / VHDL
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    Project for Netra N. -- 2 Finalizado left

    Computer engineering freelancer project with Verilog.

    Analog / Mixed Signal / Digital Digital Signal Processing FPGA MATLAB Verilog / VHDL
    $80 (Avg Bid)
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    VLSI Design : Verilog code for the Graph Convolutional Neural Networks (GCNs) module Finalizado left

    ASIC Acceleration for Graph Convolutional Neural Networks (GCNs) The task is to write a verilog code use that instantiates the GCN module. This verilog code check the correctness of the module with behavioral, post-synthesis, and post-Innovus Verilog netlists. Rest of the documents will be provided in the chat.

    ASIC Ingeniería eléctrica Ingeniería FPGA Verilog / VHDL
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    I need an influencer for my books Finalizado left

    I've written 10 books, but recently sales have flatlined. I advertise on Amazon AMS and BookBub in a limited fashion. I tried social media ads back in 2014 when I started and had NO luck at all, so I prefer to advertise where readers lurk. I've never put anything out on TikTok, Instagram or YouTube and I can't help but wonder if they would be viable places to draw new readers. It seems like TikTok and Instagram are the "popular" places to advertise...IF you have someone with a ton of followers promoting you. I need an influencer who can get me "trending" and draw more readers to my works. My website is: - my books can be seen there. They are also on Amazon and Audible.

    Book Marketing Book Review Digital Marketing Marketing de Facebook Influencer Marketing Instagram Marketing Marketing por Internet Marketing Marketing Strategy Product Marketing Comentarios Sales Promotion Marketing en redes sociales Twitter Marketing Marketing viral
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    verilog coding game -- 2 Finalizado left

    Make the RED square move and if its hits any of the sides, then the player loses the game. Add a graphic indicating the player lost. Add a points keeping system on the screen or FPGA

    Programación en C Programación en C++ FPGA Microcontrolador Verilog / VHDL
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    verilog coding game Finalizado left

    Make the RED square move and if its hits any of the sides, then the player loses the game. Add a graphic indicating the player lost. Add a points keeping system on the screen or FPGA

    Programación en C Programación en C++ FPGA Microcontrolador Verilog / VHDL
    $101 (Avg Bid)
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    Trophy icon Design the Scribes (ai-powered personal writing assistants) , in clip-art style, for a new SaaS startup named SalesScribe Finalizado left

    I need your help to develop a standard style & design for the Scribes in my new SaaS startup called SalesScribe! is the only AI-Powered Personal Writing Assistant designed specifically for B2B salespeople. AEs, AMs, SDRs, BDRs, CSRs, & Sales Leaders - focus on selling while your Scribe makes your daily sales emails, social media posts, & email marketing campaigns more compelling. Have your digital design work be viewed and used by thousands of users once this startup rocket ship is launched in early 2023. The winner will have the opportunity to continue working with us as we build on the Scribe concept in 2023 and beyond! The contest winner will be chosen based on (a) their ability to follow directions, (b) their ability to think outside the box while still followin...

    Caricaturas y dibujos animados Diseño gráfico Ilustración Illustrator Diseño de sitios web
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    Design mips code in assembly language using verilog hdl Finalizado left

    I have a single mips code that I would like to convert to a double

    Assembler Ingeniería Microcontrolador Verilog / VHDL
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    Code design in assembly language - Finalizado left

    I need a design on verilog hdl that implements double MIPS at the same time

    Assembler Programación en C FPGA Verilog / VHDL
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    Project assistance required Finalizado left

    The detailed paper of the project is attached below. The skills required for the same are MATLAB, Xilinix, Verilog.

    Electrónica FPGA Mathlab y Mathematica Verilog / VHDL
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    Trophy icon Design me a logo. Finalizado left

    I am starting a digital marketing company called Amplified Marketing Solutions. Our purpose is to produce increased business for our clients by generating and improving advertisements, lead generation, and customer acquisition. The logo would need to reflect this with design aspects that portray elevation, betterment, augmentation, etc. It needs to say "Amplified Marketing Solutions" or "AMS". We are looking for a logo that is more horizontally oriented rather than vertically so longer rather than tall. We're not necessary looking for anything musical like amps on a stereo.

    Diseño 3D Diseño gráfico Illustrator Diseño de logotipos Photoshop
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    Amazon FBA Virtual Manager Finalizado left

    I would like to hire an Amazon expert to handle my Ongoing Projects. He/Her has to be very well aware of all the process on Amazon. Should be able to list the products and Optimize the listings with Top performing keywords, Content writing, AMS and PPC Campaigns expert. Images designing and Video editing is an added Advantage. Please note: I am looking for an Individual and not an Agency. I will pay only when I give any tasks to the freelancer and this will be a part time job.

    Amazon FBA Amazon Listings Optimization Amazon Product Launch
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    Debuging verilog Finalizado left

    Debuging verilog

    Altera Quartus ASIC Digital ASIC Coding FPGA Verilog / VHDL
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    Simple air tickets search form Finalizado left

    ...fields: - From - To No need to come up with any specific design and styles - so functionality is the goal. The same fields on can be taken as an example. Important points: 1. These fields have to receive data from URL parameters in the following format: ?from=AMS&to=FCO where the AMS and FCO are the airport codes as per IATA standards. 2. These fields need to display full City and Airport names, pulled from the database Airport Autocomplete connects to. For example: - Amsterdam Schipol (AMS) - Rome Fiumicino (FCO) 3. Value attributes of these input fields should only contain the 3-symboled IATA codes, same as in URL params. 4. Input edit functionality and appearance need to stay the same as by mentioned CodePen script. 5. As a result - we need a single HT...

    CSS HTML JavaScript jQuery / Prototype
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    design verification engineer Finalizado left

    • Strong knowledge Design & Verification methodologies of either of these (Times/Untimed SW Models), RTL IP, VIPs, UVM Env. • Understanding of verification tools like Simulator, Synthesis etc. • Hands on experience on C/C++, System Verilog, UVM, SystemC, RTL • Understanding of some of the standard protocol interfaces like AMBA, Automotive, PCIe, USB etc. • Excellent written and verbal interpersonal skills • Self-motivated and great teammate

    Ingeniería eléctrica Electrónica Ingeniería Microcontrolador Verilog / VHDL
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    Code design in assembly language Finalizado left

    I need a design on verilog hdl that implements double MIPS at the same time

    Assembler Programación en C Programación en C++ Verilog / VHDL Ensamblador x86/x64
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    Project for Moaz Khaled Feriz K. Finalizado left

    السلام عليكم ورحمة الله وبركاته واسعد الله اوقاتك بكل خير عندي واجب ومحتاج مساعدتك اذا وقتك يسمح. انشاء بروجكت بال verilog بحيث يقرأ محتويات ال ROM ويخرج المحتوى على LEDs

    Altera Quartus ASIC Digital ASIC Coding FPGA Very-large-scale integration (VLSI)
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    Project for Ahmed M. Finalizado left

    Hi Ahmed M., I need your help on single-port ROM verilog project. Please have a look to the attached file and let me know. Thanks

    Arduino Programación en C++ FPGA Coding LabVIEW Diseño PCB
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    Custom Sofa couch Finalizado left

    I have designed a couch and I need someone who can create the cad file for it. The file format that I need is DWG, DWF, EPS, AI or autocad. The back p...have designed a couch and I need someone who can create the cad file for it. The file format that I need is DWG, DWF, EPS, AI or autocad. The back piece will need to be spilt into two parts. Also please add screw holes and screw suggestions. I also need to have it be able to hold the weight of 5-10 people. The arms Ans back will be metal Ans the seat will be glass or something similar. The ams & back also have an under ledge that the glass will sit on. I will also need cushions & patterns designed for than as well. The arms Ans back will have cushions that fold over the edge. Ans the seat will have pads (stacked An...

    Modelado 3D Renderización 3D AutoCAD CAD/CAM Solidworks
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    Hi Need RISC V RTL design using Verilog for ARTY 7 board Finalizado left

    Hi I need RISC V RTL code using Verilog.

    Programación en C Programación en C++ FPGA Microcontrolador Verilog / VHDL
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    ticketing machine system Finalizado left

    ticketing machine system via Verilog codes using quarters ll

    Electrónica Verilog / VHDL
    $22 (Avg Bid)
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    Project for Sardar Hasnain A. Finalizado left

    I will love to chat with you about my project. Please let me know when you can https://www.freelancer.com/projects/verilog-vhdl/FPGA-expert-34634495/details

    Control System Design Entrada de datos Software integrado Embedded Systems Diseño industrial
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    Project for Damian L. Finalizado left

    I will love to chat with you about my project. Please let me know when you can https://www.freelancer.com/projects/verilog-vhdl/FPGA-expert-34634495/details

    Altera Quartus Analog Analog Electronics Antenna Design Assembler
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    Project for Loganathan N. Finalizado left

    I have a project i want to talk to you about https://www.freelancer.com/projects/verilog-vhdl/FPGA-expert-34634495/details Please let me know when you have time to chat

    Digital Signal Processing Electronic Design FPGA Coding Signal Processing Very-large-scale integration (VLSI)
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    ETRM/CTRM Engineers wanted Finalizado left

    I am looking ETRM/CTRM engineers, who will work remotely and manage project. The project will last from 3 to 9 months, the below is required techno/Functional SME • 3-5 Years hands-on technical/Functional knowledge • 3-5 Years Industry knowledge(North America/UK Gas Power scheduling, Trading, Logisti...Years Industry knowledge(North America/UK Gas Power scheduling, Trading, Logistics & Back Office) • Medium- Expert level knowledge of one of the following ETRM/CTRM products. o Right Angle, Endur, Allegro, Aligne, Front Arena. • Experience with Technical Upgrades and Installation. • Desired technical skills • Java, C++, Python, Oracle Bi, Postgres SQL, Oracle sql,PL/SQL o DOS, Windows, Unix/Linux, AMS, Azure • Open to work US EST/CST hours or ...

    Oracle Python
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    Verilog, SV & UVM Trainer Finalizado left

    We are looking for a trainer, who teach online Verilog, SV & UVM to students

    Ingeniería FPGA Verilog / VHDL
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    Trophy icon Build me a logo Finalizado left

    Logo for an industrial electrician that specialises in Machine Automation and systems Logo will be AMS (Automated Machinery Specialist)

    Diseño gráfico Illustrator Diseño de logotipos Photoshop
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    IMPLMENTATION OF BEMD STEGANOGRAPHY ALGORITHM USING FPGA (verilog code) Finalizado left

    - write Verilog code for steganography algorithm so that I can be implemented on FPGA - using Verilog Xilinx ise have to write module code & test bench where it can be implemented on Fpga

    FPGA Verilog / VHDL
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